SiliconScapesArchitecture · RTL · Prototype

Spec-Driven RTL Delivery

When the architect is in one company and the RTL designers are in another, the specification is the only shared truth. We run a method that keeps it that way.

The method

  • Controlled documents. A Hardware Architecture Specification, per-block Micro-Architecture Specifications and an inter-block interface specification, each versioned, each with a reviewer focus guide per revision.
  • Change notes, not edits. Every architectural change is a staged note reviewed before it is applied, so the RTL team sees what moved and why before the document does.
  • A decision registry. Live rulings with identifiers that the spec, the RTL and the reviews all cite. Superseded rulings stay visible.
  • A golden model. A bit-exact reference the RTL is measured against on real data, so releases are judged on numbers.
  • Tagged releases and pinned dependencies. Across every IP repository, so "which version" always has an answer.
  • Integration benches. Testbenches at the seams between blocks, where each block's own bench cannot see. This is where cross-IP defects live.

Why it matters

On a current engagement the client's designers implement RTL across fifteen repositories. An integration bench exposed an addressing mismatch between a matcher and its buffer that neither block's own bench could detect, because each modeled its own reading of the same sentence in the spec. Both sides had passed their tests. The seam had not.

The same method produced a repeatable Tensilica core-integration procedure that a client's engineers now run without us, and a signed completion report closing an FPGA prototyping SOW against written acceptance criteria.

Case study: the visual tracking accelerator →