A small firm that has shipped at every stage
SiliconScapes was founded in 2021 by Dr. Kevin Irick after two decades of FPGA and ASIC work across academia, IBM, defense research programs and a billion-transistor AR SoC. The firm exists to do one thing well: take custom hardware from a specification to a working prototype without losing anything at the handoffs.
The people who do the work
Kevin Irick, PhD
Founder · Hardware architect
Twenty-plus years across FPGA and ASIC design. PhD in Computer Science and Engineering from Penn State, two US patents in hardware vision, twenty-five peer-reviewed publications, DARPA and ONR program history. Architect of record on a five-stage visual tracking accelerator; first power-on of a billion-transistor AR SoC. Speaker at Cadence LIVE 2025 on accelerator integration with Tensilica.
Jimil Irick
Hardware design engineer
BS Electrical Engineering, University of Vermont. Three years of FPGA design at MIT Lincoln Laboratory on camera-based aerospace and defense systems. Since 2022: RTL for perception accelerators, Stratus and Catapult HLS ports, Versal video datapath bring-up, Veloce and Palladium pre-silicon test, CoreSight trace frameworks, DMA drivers and Linux IOMMU integration.
Kamil Amanowicz
Senior embedded software engineer
Kernel and RTOS engineer with a decade in system software: custom memory-management kernel drivers on an AR wearable, RTOS filesystems and drivers, platform software at Samsung R&D. At SiliconScapes: software-driven pre-silicon verification, baremetal CoreSight trace bring-up, SMMUv3 configuration for custom accelerators, and DSP firmware.
Specialists we bring in for the engagements that need them
Vince Vigna
Associate · Tensilica & DSP platforms
MS Electrical Engineering, University of Florida. Twenty-five years of DSP platform work at Motorola and on a spatial-computing SoC program: Xtensa LX6 through LX8, HiFi, Vision P6, Q6 and C5 cores, TIE instruction-set extension, XOS and FreeRTOS, pre-silicon platform validation on Palladium and Virtualizer. One US patent.
Associates work under SiliconScapes statements of work with the same acceptance criteria as the core team. We tell you in advance when an associate is on your engagement and why.
Why clients trust the spec
- PhD, Computer Science and Engineering, The Pennsylvania State University
- US Patents 8,081,816 and 8,165,386: hardware object recognition and audience measurement from image streams
- Twenty-five publications at FPL, FCCM, DAC, HPCA, ICCAD and IEEE Transactions
- DARPA NeoVision II FPGA hardware lead; ONR ARES vision pipeline; IBM CAPI first integrator for vision
- Cadence Tensilica partner (CLLA); Edge AI and Vision Alliance member
- Industry partner on NIH-funded assistive-vision research with USC and Penn State
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